The present disclosure generally relates to the field of electronics. More particularly, an embodiment of the invention relates to a locking technique that improves translation lookaside buffer (TLB) performance for input/out (I/O) memory address translations.
Computer networks have become an integral part of computing. To improve networking bandwidth, some systems may utilize virtualization. For example, virtual memory addressing may allow for access to a relatively larger amount of storage. However, virtualized environments may limit full utilization of advances in networking bandwidth, e.g., due to overhead associated with translating between I/O virtual and host memory physical addresses.